AMD Announces Radeon RX 6600XT, Reveals Q2 Results, and Intel Shares Roadmap News
Posted: 12:16PM
Author: Guest_Jim_*
This week has had more than just gaming news, and with the significance of these announcements, I thought it appropriate to share a separate news item for them than placing the information at the bottom of the gaming news item.
Going in alphabetical order, AMD announced the Radeon RX 6600XT this week, targeting high-frame rate 1080p gaming. It uses the RDNA 2 architecture like the rest of the RX 6000 series but is a smaller chip, offering only 32 MB of Infinity Cache. For VRAM it has 8 GB of GDDR6 connected on a 128 bit interface. AMD is claiming the GPU with its 32 Compute Units, 2589 MHz maximum boost clock and 2359 MHz Game Clock enables it to be 15% faster, on average, with maximum settings compared to the RTX 3060. Its total board power is stated as starting at 160 W, which should translate to a single 8-pin connector as that provides 150 W and the PCIe slot can provide 75 W, though we will have to see what the AIB partners put together.
AMD expects ASRock, Asus, Biostar, Gigabyte, MSI, PowerColor, Sapphire, XFX, and Yeston to have cards available on August 11. The suggested price is $379, but considering the current state of the GPU market, we will just have to see if any actually sell at that.
Source: AMD [1] (Radeon RX 6600XT)
This week AMD also shared its Q2 financial results and with that information it is not too surprising that the stock price reached a new maximum of over $100 a share. According to the results, the year-over-year increase to Q2 revenue was 99% and gross profit increased 116%. The company clearly had an excellent second quarter this year and the expectation is now to achieve 60% year-over-year annual revenue growth thanks to "strong execution and increased customer preference" for AMD's products. I recognize financial information might not be of particular interest, but it is a rather significant achievement considering six years ago AMD stock was valued at under $2. Of course Intel has not been having the best six years, but it is working on changing that.
Source: AMD [2] (Q2 2021 Financial Results)
Intel revealed this week its roadmap for its future process and packaging technologies that will power its products through 2025 and beyond. Among these new technologies is RibbonFET, a gate-all-around transistor design that should enable faster switching speeds while taking up less space compared to the current FinFET design. While the FinFET design has the transistor gate crossing over the channel, producing a 3D design that surpassed traditional planar CMOS designs prior to it. With RibbonFET the channels or ribbons are completed surrounded by the gate, increasing the effectiveness of the gate without increasing the footprint involved.
Also on the roadmap is PowerVia which significantly changes the design for power delivery in a processor. Instead of having the power routing on the front side of the wafer, along with the various wires connecting the caches, buffers, and accelerators, this design places the power on the backside of the wafer. This should improve signal transmission by reducing the interference from the power flowing so near the data signals.
Intel also announced it will be the first to receive a High Numerical Aperture EUV production tool from ASML, which has the potential to push beyond some of the boundaries of current EUV production tools. As is explained in the Anandtech article linked to below, this will increase the power of the laser used for the etching process, which in turn improves the accuracy of the printed lines. Increasing the patterning can achieve this effect as well, but at the cost of yields so this solution would allow single-patterning to continue for longer.
The company has also renamed its process nodes to be Intel 7 for the current process that will produce Alder Lake this year, Intel 4, entering production H2 2022, Intel 3, H2 2023, Intel 20A, 2024, and then Intel 18A in early 2025. It is worth noting Intel has dropped the nanometer unit from these marketing names, though the A implies angstroms (one order of magnitude smaller than nanometers), and this does make some sense as these are not accurate physical measurements. That is true for other manufacturers as well, with 7 nm processes not necessarily producing features that small, but rather they are an improvement over the previous technology.
For packaging technologies, Intel announced Foveros Omni and Foveros Direct that are both rather significant. With Foveros Omni, Intel is claiming unbounded flexibility by allowing die disaggregation as top and base die tiles can be mixed across nodes and the top tiles can even be wider than the base tiles. Normally you would expect the top to be as large or smaller than the base, but this technology allows copper columns to be built up, connecting the top dies directly to the substrate without vias through the base die. Foveros Direct is copper-to-copper bonding, effectively directly connecting two dies and it enables sub-10 micron bump pitches. If this sounds familiar, TSMC has its own Chip-on-Wafer or Wafer-on-Wafer method that similarly stacks dies together, but regardless of the company it is an interesting and impressive technology, especially as companies move towards multi-chip designs.
Source: Intel (Process and Packaging Roadmap) and Anandtech

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