36-Core CPU with Network-on-Chip Created
The development of multi-core CPUs changed the technology world, as suddenly computers could become more powerful, without having to push to ever higher clock speeds. Multi-core designs do introduce some interesting complications though, which can make adding more and more cores very difficult. Researchers at MIT however, have built prototype chips with 36 cores to demonstrate a solution for efficiently connecting the cores.
Modern multi-core CPUs pass all information along a single wire called the bus, so when two cores need to send or receive data, one is granted exclusive access. As core counts increase, this approach will stifle performance, so the researchers have been looking into networks that mimic the Internet, for communication between cores. With this 'network-on-chip' approach, each core is directly connected to those adjacent to it and can pass information along, when two distant cores need to communicate. One potential issue with this approach though is that the cores' local caches could lose coherence, with one core not realizing another has the most recent version of some data. To address this, there is a second series of wires between each core that send packets of data, tracking when a core requests information. This router-like solution allows cores to know about requests for data and be ready for them, and with hierarchical priorities, chronological ordering can be achieved.
To prove the practicality of this technology, the researchers intend to test their 36-core prototypes by running a modified version of Linux with them. Once armed with some performance numbers, blueprints for the chip will be released as open-source code.