JMicron will be releasing a new NAND flash controller chip, the JMF612. It will use an ARM9 core in a 289-ball TFBGA package, will support the use of up to 256MB of DDR or DDR2 DRAM as an external cache, and will have 32 KB of ROM. It was designed to fix stuttering problems during random write operations, which was a problem that the JMF602 had and that the JMF602B quickly but temporarily partially remedied. The new chip is designed specifically to work with the new 34 and 32 nm NAND chips, which will be smaller, faster, and cheaper to use, and when combined with new higher density flash chips will significantly reduce prices of SSD's. The chips will allow SSD's to have Native Command Queuing (NCQ) and support 128-bit AES (Advanced Encryption Standard) disk encryption. Supporting interfaces are SATA 3.0 and USB 2.0. Production is expected to start in July.